CCU40=Const_0, USIC0=Const_0, CCU80=Const_0, CCU41=Const_0, ERU1=Const_0, POSIF0=Const_0, VADC=Const_0
Peripheral 0 Clock Gating Clear
| VADC | VADC Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |
| CCU40 | CCU40 Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |
| CCU41 | CCU41 Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |
| CCU80 | CCU80 Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |
| POSIF0 | POSIF0 Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |
| USIC0 | USIC0 Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |
| ERU1 | ERU1 Gating Clear 0 (Const_0): No effect 1 (Const_1): Disable gating |