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Infineon /XMC4300 /SCU_CLK /CGATCLR1

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Interpret as CGATCLR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Const_0)LEDTSCU0 0 (Const_0)MCAN0 0 (Const_0)DAC 0 (Const_0)MMCI 0 (Const_0)USIC1 0 (Const_0)PPORTS

LEDTSCU0=Const_0, DAC=Const_0, USIC1=Const_0, MCAN0=Const_0, PPORTS=Const_0, MMCI=Const_0

Description

Peripheral 1 Clock Gating Clear

Fields

LEDTSCU0

LEDTS Gating Clear

0 (Const_0): No effect

1 (Const_1): Disable gating
MCAN0

MultiCAN Gating Clear

0 (Const_0): No effect

1 (Const_1): Disable gating
DAC

DAC Gating Clear

0 (Const_0): No effect

1 (Const_1): Disable gating
MMCI

MMC Interface Gating Clear

0 (Const_0): No effect

1 (Const_1): Disable gating
USIC1

USIC1 Gating Clear

0 (Const_0): No effect

1 (Const_1): Disable gating
PPORTS

PORTS Gating Clear

0 (Const_0): No effect

1 (Const_1): Disable gating

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data