Regviz

Infineon /XMC4300 /SCU_CLK /CGATSET1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CGATSET1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Infineon/XMC4300/SCU_CLK/CGATSET1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Const_0)LEDTSCU0 0 (Const_0)MCAN0 0 (Const_0)DAC 0 (Const_0)MMCI 0 (Const_0)USIC1 0 (Const_0)PPORTS

PPORTS=Const_0, LEDTSCU0=Const_0, USIC1=Const_0, DAC=Const_0, MMCI=Const_0, MCAN0=Const_0

Description

Peripheral 1 Clock Gating Set

Fields

LEDTSCU0

LEDTS Gating Set

0 (Const_0): No effect

1 (Const_1): Enable gating
MCAN0

MultiCAN Gating Set

0 (Const_0): No effect

1 (Const_1): Enable gating
DAC

DAC Gating Set

0 (Const_0): No effect

1 (Const_1): Enable gating
MMCI

MMC Interface Gating Set

0 (Const_0): No effect

1 (Const_1): Enable gating
USIC1

USIC1 Gating Set

0 (Const_0): No effect

1 (Const_1): Enable gating
PPORTS

PORTS Gating Set

0 (Const_0): No effect

1 (Const_1): Enable gating

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data