RTC_ATIM1=Const_0, RTC_TIM1=Const_0, HDCR=Const_0, PI=Const_0, PRWARN=Const_0, OSCSICTRL=Const_0, RTC_TIM0=Const_0, RTC_ATIM0=Const_0, RMX=Const_0, HDSET=Const_0, OSCULCTRL=Const_0, RTC_CTR=Const_0, HDCLR=Const_0, DLROVR=Const_0, AI=Const_0
SCU Service Request Clear
| PRWARN | WDT pre-warning Interrupt Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| PI | RTC Periodic Interrupt Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| AI | RTC Alarm Interrupt Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| DLROVR | DLR Request Overrun Interrupt clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| HDCLR | HDCLR Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| HDSET | HDSET Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| HDCR | HDCR Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| OSCSICTRL | OSCSICTRL Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| OSCULCTRL | OSCULCTRL Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| RTC_CTR | RTC CTR Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| RTC_ATIM0 | RTC ATIM0 Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| RTC_ATIM1 | RTC ATIM1 Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| RTC_TIM0 | RTC TIM0 Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| RTC_TIM1 | RTC TIM1 Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |
| RMX | Retention Memory Mirror Register Update Clear 0 (Const_0): No effect 1 (Const_1): Clear the status bit |