RTC_TIM0=Const_0, HDSET=Const_0, AI=Const_0, RMX=Const_0, RTC_CTR=Const_0, OSCSICTRL=Const_0, OSCULCTRL=Const_0, RTC_ATIM1=Const_0, RTC_TIM1=Const_0, RTC_ATIM0=Const_0, HDCR=Const_0, PI=Const_0, HDCLR=Const_0, PRWARN=Const_0, DLROVR=Const_0
SCU Service Request Mask
PRWARN | WDT pre-warning Interrupt Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
PI | RTC Periodic Interrupt Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
AI | RTC Alarm Interrupt Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
DLROVR | DLR Request Overrun Interrupt Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
HDCLR | HDCLR Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
HDSET | HDSET Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
HDCR | HDCR Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
OSCSICTRL | OSCSICTRL Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
OSCULCTRL | OSCULCTRL Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
RTC_CTR | RTC CTR Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
RTC_ATIM0 | RTC ATIM0 Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
RTC_ATIM1 | RTC ATIM1 Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
RTC_TIM0 | RTC TIM0 Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
RTC_TIM1 | RTC TIM1 Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |
RMX | Retention Memory Mirror Register Update Mask 0 (Const_0): Disabled 1 (Const_1): Enabled |