PLLSP=Const_0, K2RDY=Const_0, PLLHV=Const_0, BY=Const_0, VCOLOCK=Const_0, PWDSTAT=Const_0, PLLLV=Const_0, K1RDY=Const_0, VCOBYST=Const_0
PLL Status Register
| VCOBYST | VCO Bypass Status 0 (Const_0): Free-running / Normal Mode is entered 1 (Const_1): Prescaler Mode is entered |
| PWDSTAT | PLL Power-saving Mode Status 0 (Const_0): PLL Power-saving Mode was not entered 1 (Const_1): PLL Power-saving Mode was entered |
| VCOLOCK | PLL LOCK Status 0 (Const_0): PLL not locked 1 (Const_1): PLL locked |
| K1RDY | K1 Divider Ready Status 0 (Const_0): K1-Divider does not operate with the new value 1 (Const_1): K1-Divider operate with the new value |
| K2RDY | K2 Divider Ready Status 0 (Const_0): K2-Divider does not operate with the new value 1 (Const_1): K2-Divider operate with the new value |
| BY | Bypass Mode Status 0 (Const_0): Bypass Mode is not entered 1 (Const_1): Bypass Mode is entered. Input fOSC is selected as output fPLL. |
| PLLLV | Oscillator for PLL Valid Low Status Bit 0 (Const_0): The OSC frequency is not usable. Frequency fREF is too low. 1 (Const_1): The OSC frequency is usable |
| PLLHV | Oscillator for PLL Valid High Status Bit 0 (Const_0): The OSC frequency is not usable. Frequency fOSC is too high. 1 (Const_1): The OSC frequency is usable |
| PLLSP | Oscillator for PLL Valid Spike Status Bit 0 (Const_0): The OSC frequency is not usable. Spikes are detected that disturb a locked operation 1 (Const_1): The OSC frequency is usable |