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Infineon /XMC4300 /SCU_RESET /PRCLR0

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Interpret as PRCLR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Const_0)VADCRS 0 (Const_0)CCU40RS 0 (Const_0)CCU41RS 0 (Const_0)CCU80RS 0 (Const_0)USIC0RS 0 (Const_0)ERU1RS

CCU41RS=Const_0, ERU1RS=Const_0, CCU40RS=Const_0, CCU80RS=Const_0, VADCRS=Const_0, USIC0RS=Const_0

Description

RCU Peripheral 0 Reset Clear

Fields

VADCRS

VADC Reset Clear

0 (Const_0): No effect

1 (Const_1): De-assert reset
CCU40RS

CCU40 Reset Clear

0 (Const_0): No effect

1 (Const_1): De-assert reset
CCU41RS

CCU41 Reset Clear

0 (Const_0): No effect

1 (Const_1): De-assert reset
CCU80RS

CCU80 Reset Clear

0 (Const_0): No effect

1 (Const_1): De-assert reset
USIC0RS

USIC0 Reset Clear

0 (Const_0): No effect

1 (Const_1): De-assert reset
ERU1RS

ERU1 Reset Clear

0 (Const_0): No effect

1 (Const_1): De-assert reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data