PRCLR2

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Interpret as PRCLR2

WDTRS=Const_0, ETH0RS=Const_0, USBRS=Const_0, ECAT0RS=Const_0, DMA0RS=Const_0, FCERS=Const_0

RCU Peripheral 2 Reset Clear

WDTRS	WDT Reset Clear 0 (Const_0): No effect 1 (Const_1): De-assert reset
ETH0RS	ETH0 Reset Clear 0 (Const_0): No effect 1 (Const_1): De-assert reset
DMA0RS	DMA0 Reset Clear 0 (Const_0): No effect 1 (Const_1): De-assert reset
FCERS	FCE Reset Clear 0 (Const_0): No effect 1 (Const_1): De-assert reset
USBRS	USB Reset Clear 0 (Const_0): No effect 1 (Const_1): De-assert reset
ECAT0RS	ECAT0 Reset Clear 0 (Const_0): No effect 1 (Const_1): De-assert reset

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