PRSET2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PRSET2

ETH0RS=Const_0, WDTRS=Const_0, USBRS=Const_0, FCERS=Const_0, ECAT0RS=Const_0, DMA0RS=Const_0

RCU Peripheral 2 Reset Set

WDTRS	WDT Reset Assert 0 (Const_0): No effect 1 (Const_1): Assert reset
ETH0RS	ETH0 Reset Assert 0 (Const_0): No effect 1 (Const_1): Assert reset
DMA0RS	DMA0 Reset Assert 0 (Const_0): No effect 1 (Const_1): Assert reset
FCERS	FCE Reset Assert 0 (Const_0): No effect 1 (Const_1): Assert reset
USBRS	USB Reset Assert 0 (Const_0): No effect 1 (Const_1): Assert reset
ECAT0RS	ECAT0 Reset Assert 0 (Const_0): No effect 1 (Const_1): Assert reset

()