Regviz

Infineon /XMC4300 /SCU_RESET /RSTSTAT

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RSTSTAT

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Infineon/XMC4300/SCU_RESET/RSTSTAT#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RSTSTAT0 (Const_0)HIBWK 0 (Const_0)HIBRS 0 (Const_0)LCKEN 0 (Const_0)ECAT0RS

ECAT0RS=Const_0, HIBWK=Const_0, HIBRS=Const_0, LCKEN=Const_0

Description

RCU Reset Status

Fields

RSTSTAT

Reset Status Information

1 (Const_00000001): PORST reset

2 (Const_00000010): SWD reset

4 (Const_00000100): PV reset

8 (Const_00001000): CPU system reset

16 (Const_00010000): CPU lockup reset

32 (Const_00100000): WDT reset

128 (Const_10000000): Parity Error reset
HIBWK

Hibernate Wake-up Status

0 (Const_0): No Wake-up

1 (Const_1): Wake-up event
HIBRS

Hibernate Reset Status

0 (Const_0): Reset de-asserted

1 (Const_1): Reset asserted
LCKEN

Enable Lockup Status

0 (Const_0): Reset by Lockup disabled

1 (Const_1): Reset by Lockup enabled
ECAT0RS

ECAT0 Reset Status Information

0 (Const_0): Reset did not occur

1 (Const_1): Reset occurred

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data