Regviz

Infineon /XMC4700 /DLR /OVRCLR

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Interpret as OVRCLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LN0)LN0 0 (LN1)LN1 0 (LN2)LN2 0 (LN3)LN3 0 (LN4)LN4 0 (LN5)LN5 0 (LN6)LN6 0 (LN7)LN7 0 (LN8)LN8 0 (LN9)LN9 0 (LN10)LN10 0 (LN11)LN11

Description

Overrun Clear

Fields

LN0

Line 0 Overrun Status Clear
LN1

Line 1 Overrun Status Clear
LN2

Line 2 Overrun Status Clear
LN3

Line 3 Overrun Status Clear
LN4

Line 4 Overrun Status Clear
LN5

Line 5 Overrun Status Clear
LN6

Line 6 Overrun Status Clear
LN7

Line 7 Overrun Status Clear
LN8

Line 8 Overrun Status Clear
LN9

Line 9 Overrun Status Clear
LN10

Line 10 Overrun Status Clear
LN11

Line 11 Overrun Status Clear

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data