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Infineon /XMC4700 /EBU /USERCON

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Interpret as USERCON

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DIP)DIP 0 (value1)ADDIO0 (value1)ADVIO

ADDIO=value1, ADVIO=value1

Description

EBU Test/Control Configuration Register

Fields

DIP

Disable Internal Pipelining
ADDIO

Address Pins to GPIO Mode

0 (value1): Address Bit is required for addressing memory

1 (value2): Address Bit is available for GPIO function
ADVIO

ADV Pin to GPIO Mode

0 (value1): ADV pin is required for controlling memory

1 (value2): ADV pin is available for GPIO function

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data