Infineon /XMC4700 /GPDMA1 /REQDSTREG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as REQDSTREG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0)CH0 0 (CH1)CH1 0 (CH2)CH2 0 (CH3)CH3 0 (value1)WE_CH0 0 (value1)WE_CH1 0 (value1)WE_CH2 0 (value1)WE_CH3

WE_CH2=value1, WE_CH0=value1, WE_CH1=value1, WE_CH3=value1

Description

Destination Software Transaction Request Register

Fields

CH0

Source request for channel 0

CH1

Source request for channel 1

CH2

Source request for channel 2

CH3

Source request for channel 3

WE_CH0

Source request write enable for channel 0

0 (value1): write disabled

1 (value2): write enabled

WE_CH1

Source request write enable for channel 1

0 (value1): write disabled

1 (value2): write enabled

WE_CH2

Source request write enable for channel 2

0 (value1): write disabled

1 (value2): write enabled

WE_CH3

Source request write enable for channel 3

0 (value1): write disabled

1 (value2): write enabled

Links

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