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Infineon /XMC4700 /SCU_CLK /CGATSET3

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Interpret as CGATSET3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)EBU

EBU=value1

Description

Peripheral 3 Clock Gating Set

Fields

EBU

EBU Gating Set

0 (value1): No effect

1 (value2): Enable gating

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data