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Infineon /XMC4700 /SCU_CLK /EBUCLKCR

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Interpret as EBUCLKCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0EBUDIV

Description

EBU Clock Control Register

Fields

EBUDIV

EBU Clock Divider Value

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data