Infineon /XMC4700 /SCU_RESET /PRSET0

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Interpret as PRSET0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)VADCRS 0 (value1)DSDRS 0 (value1)CCU40RS 0 (value1)CCU41RS 0 (value1)CCU42RS 0 (value1)CCU80RS 0 (value1)CCU81RS 0 (value1)POSIF0RS 0 (value1)POSIF1RS 0 (value1)USIC0RS 0 (value1)ERU1RS

POSIF0RS=value1, USIC0RS=value1, CCU42RS=value1, VADCRS=value1, CCU80RS=value1, ERU1RS=value1, POSIF1RS=value1, CCU81RS=value1, CCU41RS=value1, CCU40RS=value1, DSDRS=value1

Description

RCU Peripheral 0 Reset Set

Fields

VADCRS

VADC Reset Assert

0 (value1): No effect

1 (value2): Assert reset

DSDRS

DSD Reset Assert

0 (value1): No effect

1 (value2): Assert reset

CCU40RS

CCU40 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

CCU41RS

CCU41 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

CCU42RS

CCU42 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

CCU80RS

CCU80 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

CCU81RS

CCU81 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

POSIF0RS

POSIF0 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

POSIF1RS

POSIF1 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

USIC0RS

USIC0 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

ERU1RS

ERU1 Reset Assert

0 (value1): No effect

1 (value2): Assert reset

Links

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