EIM_EN=DISABLE, ADC1_EIM_TRIG_SEL=NONE, EIM_REP=1, EIM_CHx=CH0
Channel setting bits for exceptional interrupt measurement register
EIM_CHx | Channel set for exceptional interrupt measurement (EIM) 0 (CH0): Channel 0 enable 1 (CH1): Channel 1 enable 2 (CH2): Channel 2 enable 3 (CH3): Channel 3 enable 4 (CH4): Channel 4 enable 5 (CH5): Channel 5 enable 6 (CH6): Channel 6 enable 7 (CH7): Channel 7 enable 8 (CH8): Channel 8 enable 9 (CH9): Channel 9 enable 10 (CH10): Channel 10 enable 11 (CH11): Channel 11 enable |
EIM_REP | Repeat count for exceptional interrupt measurement (EIM) 0 (1): 1 measurement 1 (2): 2 measurements 2 (4): 4 measurements 3 (8): 8 measurements 4 (16): 16 measurements 5 (32): 32 measurements 6 (64): 64 measurements 7 (128): 128 measurements |
EIM_EN | Exceptional interrupt measurement (EIM) Trigger Event enable 0 (DISABLE): Start of EIM disabled 1 (ENABLE): Start of EIM enabled |
ADC1_EIM_TRIG_SEL | Trigger selection for exceptional interrupt measurement (EIM) 0 (NONE): None 1 (COUT63): COUT63 2 (GPT12_T6OUT): GPT12_T6OUT 3 (GPT12_T3OUT): GPT12_T3OUT 4 (T2): t2_adc_trigger 5 (T21): t21_adc_trigger |