ADC1_ESM_TRIG_SEL=NONE, ESM_STS=NOT_ACTIVE, ESM_EN=DISABLE
Channel setting bits for exceptional sequence measurement register
ESM_0 | Channel sequence for exceptional sequence measurement (ESM) 1 (CH0_EN): Channel 0 enable 2 (CH1_EN): Channel 1 enable 4 (CH2_EN): Channel 2 enable 8 (CH3_EN): Channel 3 enable 16 (CH4_EN): Channel 4 enable 32 (CH5_EN): Channel 5 enable 64 (CH6_EN): Channel 6 enable 128 (CH7_EN): Channel 7 enable 256 (CH8_EN): Channel 8 enable 512 (CH9_EN): Channel 9 enable 1024 (CH10_EN): Channel 10 enable 2048 (CH11_EN): Channel 11 enable |
ADC1_ESM_TRIG_SEL | Trigger selection for exceptional interrupt measurement (ESM) 0 (NONE): None 1 (COUT63): COUT63 2 (GPT12_T6OUT): GPT12_T6OUT 3 (GPT12_T3OUT): GPT12_T3OUT 4 (T2): t2_adc_trigger 5 (T21): t21_adc_trigger |
ESM_EN | Enable for Exceptional Sequence Measurement Trigger Event 0 (DISABLE): Start of ESM disabled 1 (ENABLE): Start of ESM enabled |
ESM_STS | Exceptional sequence measurement is finished 0 (NOT_ACTIVE): Exceptional Sequence Measurement not done 1 (DONE): Exceptional Sequence Measurement done |