Infineon /tle984x /ADC1 /DCHTH1_4_UPPER

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Interpret as DCHTH1_4_UPPER

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MIN)DCH1_UP0 (MIN)DCH2_UP0 (MIN)DCH3_UP0 (MIN)DCH4_UP

DCH4_UP=MIN, DCH2_UP=MIN, DCH1_UP=MIN, DCH3_UP=MIN

Description

Upper comparator trigger level differential channel 1-4 register

Fields

DCH1_UP

Differential channel 1 upper trigger level

0 (MIN): Min. threshold value = 0

255 (MAX): Max. threshold value = 255

DCH2_UP

Differential channel 2 upper trigger level

0 (MIN): Min. threshold value = 0

255 (MAX): Max. threshold value = 255

DCH3_UP

Differential channel 3 upper trigger level

0 (MIN): Min. threshold value = 0

255 (MAX): Max. threshold value = 255

DCH4_UP

Differential channel 4 upper trigger level

0 (MIN): Min. threshold value = 0

255 (MAX): Max. threshold value = 255

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