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Infineon /tle984x /ADC1 /IRQEN_1

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Interpret as IRQEN_1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)VBATSEN_IEN 0 (DISABLED)VS_IEN 0 (DISABLED)MON1_IEN 0 (DISABLED)MON2_IEN 0 (DISABLED)MON3_IEN 0 (DISABLED)MON4_IEN 0 (DISABLED)MON5_IEN 0 (DISABLED)P2_1_IEN 0 (DISABLED)P2_2_IEN 0 (DISABLED)P2_3_IEN 0 (DISABLED)P2_6_IEN 0 (DISABLED)P2_7_IEN 0 (DISABLED)P2_0_IEN 0 (DISABLED)EIM_IEN 0 (DISABLED)ESM_IEN 0 (DISABLED)DU1LO_IEN 0 (DISABLED)DU1UP_IEN 0 (DISABLED)DU2LO_IEN 0 (DISABLED)DU2UP_IEN 0 (DISABLED)DU3LO_IEN 0 (DISABLED)DU3UP_IEN 0 (DISABLED)DU4LO_IEN 0 (DISABLED)DU4UP_IEN

DU4UP_IEN=DISABLED, DU1UP_IEN=DISABLED, DU3LO_IEN=DISABLED, P2_7_IEN=DISABLED, MON1_IEN=DISABLED, VS_IEN=DISABLED, ESM_IEN=DISABLED, P2_6_IEN=DISABLED, MON4_IEN=DISABLED, MON3_IEN=DISABLED, MON2_IEN=DISABLED, DU3UP_IEN=DISABLED, MON5_IEN=DISABLED, DU2LO_IEN=DISABLED, EIM_IEN=DISABLED, P2_1_IEN=DISABLED, VBATSEN_IEN=DISABLED, DU1LO_IEN=DISABLED, P2_2_IEN=DISABLED, P2_3_IEN=DISABLED, DU2UP_IEN=DISABLED, P2_0_IEN=DISABLED, DU4LO_IEN=DISABLED

Description

ADC1 interrupt enable 1 register

Fields

VBATSEN_IEN

ADC1 VBAT_SENSE interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
VS_IEN

ADC1 VS interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
MON1_IEN

ADC1 MON 1 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
MON2_IEN

ADC1 MON 2 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
MON3_IEN

ADC1 MON 3 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
MON4_IEN

ADC1 MON 4 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
MON5_IEN

ADC1 MON 5 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
P2_1_IEN

ADC1 Port 2.1 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
P2_2_IEN

ADC1 Port 2.2 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
P2_3_IEN

ADC1 Port 2.3 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
P2_6_IEN

ADC1 Port 2.6 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
P2_7_IEN

ADC1 Port 2.7 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
P2_0_IEN

ADC1 Port 2.0 interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
EIM_IEN

Exceptional interrupt measurement (EIM) interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
ESM_IEN

Exceptional sequence measurement (ESM) interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU1LO_IEN

Differential unit 1 lower interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU1UP_IEN

Differential unit 1 upper interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU2LO_IEN

Differential unit 2 lower interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU2UP_IEN

Differential unit 2 upper interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU3LO_IEN

Differential unit 3 lower interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU3UP_IEN

Differential unit 3 upper interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU4LO_IEN

Differential unit 4 lower interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled
DU4UP_IEN

Differential unit 4 upper interrupt enable

0 (DISABLED): Interrupt disabled

1 (ENABLED): Interrupt enabled

Links

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Register License

Copyright © 2022 Infineon Technologies AG Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the “Software”) to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following: The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor. THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data