Infineon /tle984x /ADC1 /SQ4_5

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SQ4_5

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SQ40SQ5

Description

Measurement unit 1 channel enable bits for cycle 4-5 register

Fields

SQ4

Sequence 4 channel enable

1 (CH0_EN): Channel 0 enable

2 (CH1_EN): Channel 1 enable

4 (CH2_EN): Channel 2 enable

8 (CH3_EN): Channel 3 enable

16 (CH4_EN): Channel 4 enable

32 (CH5_EN): Channel 5 enable

64 (CH6_EN): Channel 6 enable

128 (CH7_EN): Channel 7 enable

256 (CH8_EN): Channel 8 enable

512 (CH9_EN): Channel 9 enable

1024 (CH10_EN): Channel 10 enable

2048 (CH11_EN): Channel 11 enable

SQ5

Sequence 5 channel enable

1 (CH0_EN): Channel 0 enable

2 (CH1_EN): Channel 1 enable

4 (CH2_EN): Channel 2 enable

8 (CH3_EN): Channel 3 enable

16 (CH4_EN): Channel 4 enable

32 (CH5_EN): Channel 5 enable

64 (CH6_EN): Channel 6 enable

128 (CH7_EN): Channel 7 enable

256 (CH8_EN): Channel 8 enable

512 (CH9_EN): Channel 9 enable

1024 (CH10_EN): Channel 10 enable

2048 (CH11_EN): Channel 11 enable

Links

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