Infineon /tle984x /ADC2 /CHx_EIM

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Interpret as CHx_EIM

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0_EN)CHx_SEL 0 (1)REP0 (DISABLE)EN 0 (TRIGGERS)SEL

REP=1, CHx_SEL=CH0_EN, SEL=TRIGGERS, EN=DISABLE

Description

Channel settings bits for exceptional interrupt measurement register

Fields

CHx_SEL

Channel set for exceptional interrupt measurement (EIM)

0 (CH0_EN): Channel 0 enable

1 (CH1_EN): Channel 1 enable

2 (CH2_EN): Channel 2 enable

3 (CH3_EN): Channel 3 enable

4 (CH4_EN): Channel 4 enable

5 (CH5_EN): Channel 5 enable

6 (CH6_EN): Channel 6 enable

REP

Repeat count for exceptional interrupt measurement (EIM)

0 (1): 1 measurement

1 (2): 2 measurements

2 (4): 4 measurements

3 (8): 8 measurements

4 (16): 16 measurements

5 (32): 32 measurements

6 (64): 64 measurements

7 (128): 128 measurements

EN

Exceptional interrupt measurement (EIM) trigger event enable

0 (DISABLE): Start of EIM disabled

1 (ENABLE): Start of EIM enabled

SEL

Exceptional interrupt measurement (EIM) trigger select

0 (TRIGGERS): GPT12PISEL.T3_GPT12_SEL, GPT12_PISEL triggers EIM

1 (NOT_SUPPORTED): Not supported

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