Infineon /tle984x /CCU6 /IEN

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Interpret as IEN

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (No_interrupt)ENCC60R 0 (No_interrupt)ENCC60F 0 (No_interrupt)ENCC61R 0 (No_interrupt)ENCC61F 0 (No_interrupt)ENCC62R 0 (No_interrupt)ENCC62F 0 (No_interrupt)ENT12OM 0 (No_interrupt)ENT12PM 0 (No_interrupt)ENT13CM 0 (No_interrupt)ENT13PM 0 (No_interrupt)ENTRPF 0 (No_interrupt)ENCHE 0 (No_interrupt)ENWHE 0 (IDLE_not_set)ENIDLE 0 (No_interrupt)ENSTR

ENT13PM=No_interrupt, ENT13CM=No_interrupt, ENWHE=No_interrupt, ENCC61R=No_interrupt, ENIDLE=IDLE_not_set, ENCC61F=No_interrupt, ENCC60R=No_interrupt, ENCC60F=No_interrupt, ENT12PM=No_interrupt, ENSTR=No_interrupt, ENT12OM=No_interrupt, ENCC62R=No_interrupt, ENCHE=No_interrupt, ENTRPF=No_interrupt, ENCC62F=No_interrupt

Description

Capture/compare interrupt enable register

Fields

ENCC60R

Capture, compare-match rising edge interrupt enable for channel 0

0 (No_interrupt): No interrupt will be generated if the set condition for bit CC60R in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CC60R in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC60

ENCC60F

Capture, compare-match falling edge interrupt enable for channel 0

0 (No_interrupt): No interrupt will be generated if the set condition for bit CC60F in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CC60F in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC60

ENCC61R

Capture, compare-match rising edge interrupt enable for channel 1

0 (No_interrupt): No interrupt will be generated if the set condition for bit CC61R in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CC61R in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC61

ENCC61F

Capture, compare-match falling edge interrupt enable for channel 1

0 (No_interrupt): No interrupt will be generated if the set condition for bit CC61F in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CC61F in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC61

ENCC62R

Capture, compare-match rising edge interrupt enable for channel 2

0 (No_interrupt): No interrupt will be generated if the set condition for bit CC62R in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CC62R in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC62

ENCC62F

Capture, compare-match falling edge interrupt enable for channel 2

0 (No_interrupt): No interrupt will be generated if the set condition for bit CC62F in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CC62F in register IS occurs. The interrupt line that will be activated is selected by bit field INPCC62

ENT12OM

Enable interrupt for T12 one-match

0 (No_interrupt): No interrupt will be generated if the set condition for bit T12OM in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit T12OM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT12

ENT12PM

Enable interrupt for T12 period-match

0 (No_interrupt): No interrupt will be generated if the set condition for bit T12PM in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit T12PM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT12

ENT13CM

Enable interrupt for T13 compare-match

0 (No_interrupt): No interrupt will be generated if the set condition for bit T13CM in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit T13CM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT13

ENT13PM

Enable interrupt for T13 period-match

0 (No_interrupt): No interrupt will be generated if the set condition for bit T13PM in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit T13PM in register IS occurs. The interrupt line that will be activated is selected by bit field INPT13

ENTRPF

Enable interrupt for trap flag

0 (No_interrupt): No interrupt will be generated if the set condition for bit TRPF in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit TRPF in register IS occurs. The interrupt line that will be activated is selected by bit field INPERR

ENCHE

Enable interrupt for correct Hall Event

0 (No_interrupt): No interrupt will be generated if the set condition for bit CHE in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit CHE in register IS occurs. The interrupt line that will be activated is selected by bit field INPCHE

ENWHE

Enable interrupt for wrong Hall Event

0 (No_interrupt): No interrupt will be generated if the set condition for bit WHE in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit WHE in register IS occurs. The interrupt line that will be activated is selected by bit field INPERR

ENIDLE

Enable idle

0 (IDLE_not_set): The bit IDLE is not automatically set when a wrong hall event is detected

1 (IDLE_set): The bit IDLE is automatically set when a wrong hall event is detected

ENSTR

Enable multi-channel mode shadow transfer interrupt

0 (No_interrupt): No interrupt will be generated if the set condition for bit STR in register IS occurs

1 (Interrupt): An interrupt will be generated if the set condition for bit STR in register IS occurs. The interrupt line that will be activated is selected by bit field INPCHE

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