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Infineon /tle984x /CCU6 /INP

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Interpret as INP

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SR0)INPCC60 0 (SR0)INPCC61 0 (SR0)INPCC62 0 (SR0)INPCHE 0 (SR0)INPERR 0 (SR0)INPT12 0 (SR0)INPT13

INPT12=SR0, INPCHE=SR0, INPERR=SR0, INPCC62=SR0, INPCC61=SR0, INPCC60=SR0, INPT13=SR0

Description

Capture/compare interrupt node pointer register

Fields

INPCC60

Interrupt node pointer for channel 0 interrupts

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected
INPCC61

Interrupt node pointer for channel 1 interrupts

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected
INPCC62

Interrupt node pointer for channel 2 interrupts

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected
INPCHE

Interrupt node pointer for the CHE interrupt

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected
INPERR

Interrupt node pointer for error interrupts

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected
INPT12

Interrupt node pointer for timer T12 interrupts

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected
INPT13

Interrupt node pointer for timer T13 interrupts

0 (SR0): Interrupt output line SR0 is selected

1 (SR1): Interrupt output line SR1 is selected

2 (SR2): Interrupt output line SR2 is selected

3 (SR3): Interrupt output line SR3 is selected

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Register License

Copyright © 2022 Infineon Technologies AG Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the “Software”) to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following: The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor. THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data