Infineon /tle984x /CCU6 /MCMCTR

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Interpret as MCMCTR

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (No_request)SWSEL0 (Direct)SWSYN 0 (No_action)STE12U 0 (No_action)STE12D 0 (No_action)STE13U

STE13U=No_action, SWSYN=Direct, STE12D=No_action, STE12U=No_action, SWSEL=No_request

Description

Multi-channel mode control register

Fields

SWSEL

Switching selection

0 (No_request): No trigger request will be generated

1 (Correct_pattern): Correct hall pattern on CCPOSx detected

2 (T13_period_match): T13 period-match detected (while counting up)

3 (T12_one_match): T12 one-match (while counting down)

4 (T12_channel_1_compare_match): T12 channel 1 compare-match detected (phase delay function)

5 (T12_period_match): T12 period match detected (while counting up) else reserved, no trigger request will be generated

SWSYN

Switching Synchronization

0 (Direct): The trigger event directly causes the shadow transfer

1 (T13_zero_match): T13 zero-match triggers the shadow transfer

2 (T12_zero_match): A T12 zero-match (while counting up) triggers the shadow transfer

STE12U

Shadow transfer enable for T12 upcounting

0 (No_action): No action

1 (ENABLED): The T12_ST shadow transfer mechanism is enabled if MCMEN = 1

STE12D

Shadow transfer Enable for T12 downcounting

0 (No_action): No action

1 (ENABLED): The T12_ST shadow transfer mechanism is enabled if MCMEN = 1

STE13U

Shadow transfer enable for T13 upcounting

0 (No_action): No action

1 (ENABLED): The T13_ST shadow transfer mechanism is enabled if MCMEN = 1

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