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Infineon /tle984x /CCU6 /TRPCTR

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Interpret as TRPCTR

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (T12_zero_match)TRPM10 0 (Hardware_reset)TRPM2 0 (DISABLED)TRPEN0 (DISABLED)TRPEN13 0 (DISABLED)TRPPEN

TRPEN13=DISABLED, TRPM10=T12_zero_match, TRPPEN=DISABLED, TRPM2=Hardware_reset, TRPEN=DISABLED

Description

Trap control register

Fields

TRPM10

Trap mode control bits 1, 0

0 (T12_zero_match): The trap state is left (return to normal operation according to TRPM2) when a zero-match of T12 (while counting up) is detected (synchronization to T12)

1 (T13_zero_match): The trap state is left (return to normal operation according to TRPM2) when a zero-match of T13 is detected (synchronization to T13)

3 (Immediately): The trap state is left (return to normal operation according to TRPM2) immediately without any synchronization to T12 or T13
TRPM2

Trap mode control bit 2

0 (Hardware_reset): Hardware_reset

1 (Software_reset): Software_reset
TRPEN

Trap enable control

0 (DISABLED): The trap functionality of the corresponding output signal is disabled; the output state is independent from bit TRPS

1 (ENABLED): The trap functionality of the corresponding output signal is enabled; the output is set to the passive state while TRPS = 1
TRPEN13

Trap enable control for timer T13

0 (DISABLED): The trap functionality for T13 is disabled; timer T13 (if selected and enabled) provides PWM functionality even while TRPS = 1

1 (ENABLED): The trap functionality for T13 is enabled; the timer T13 PWM output signal is set to the passive state while TRPS = 1
TRPPEN

Trap pin enable

0 (DISABLED): The trap functionality based on the input pin CTRAP is disabled. A trap can only be generated by software by setting bit TRPF

1 (ENABLED): The trap functionality based on the input pin CTRAP is enabled. A trap can be generated by software by setting bit TRPF or by CTRAP = 0

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Copyright © 2022 Infineon Technologies AG Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the “Software”) to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following: The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor. THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data