RegViz: Visualize NVIC

Infineon /tle984x /CPU /NVIC_ICER

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Interpret as NVIC_ICER

Int_GPT2=DISABLE, Int_GPT1=DISABLE, Int_MON=DISABLE, Int_UART1=DISABLE, Int_UART2=DISABLE, Int_ADC2=DISABLE, Int_HS2=DISABLE, Int_CCU6SR2=DISABLE, Int_EXINT1=DISABLE, Int_DU=DISABLE, Int_LS1=DISABLE, Int_SSC1=DISABLE, Int_HS1=DISABLE, Int_CCU6SR1=DISABLE, Int_WAKEUP=DISABLE, Int_CCU6SR0=DISABLE, Int_ADC1=DISABLE, Int_PORT2=DISABLE, Int_SSC2=DISABLE, Int_EXINT0=DISABLE, Int_LS2=DISABLE, Int_CCU6SR3=DISABLE

Description

Interrupt clear-enable register

Fields

Int_GPT1	Interrupt clear for GPT1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_GPT2	Interrupt clear for GPT2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_ADC2	Interrupt clear for MU, ADC2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_ADC1	Interrupt clear for ADC1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_CCU6SR0	Interrupt clear for CCU6 SR0 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_CCU6SR1	Interrupt clear for CCU6 SR1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_CCU6SR2	Interrupt clear for CCU6 SR2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_CCU6SR3	Interrupt clear for CCU6 SR3 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_SSC1	Interrupt clear for SSC1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_SSC2	Interrupt clear for SSC2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_UART1	Interrupt clear for UART1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_UART2	Interrupt clear for UART2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_EXINT0	Interrupt clear for external Int 0 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_EXINT1	Interrupt clear for external Int 1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_WAKEUP	Interrupt clear for WAKEUP 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_LS1	Interrupt clear for LS1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_LS2	Interrupt clear for LS2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_HS1	Interrupt clear for HS1 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_HS2	Interrupt clear for HS2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_DU	Interrupt clear for differential unit 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_MON	Interrupt clear for MON 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled
Int_PORT2	Interrupt Clear for PORT2 0 (DISABLE): On reads the associated interrupt is disabled, no effect on write 1 (ENABLE): On reads the associated interrupt is enabled, on writes the associated interrupt is disabled

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