T5R=STOP, T5RC=T5R, T5UDE=T5UD, T5UD=UP, T5CLR=NOT_CLEARED, CI=DISABLED, T5SC=DISABLED, T5M=TIMER_MODE, CT3=CAPIN
Timer T5 control register
| T5I | Timer T5 input parameter selection |
| T5M | Timer T5 input mode control 0 (TIMER_MODE): Timer mode 1 (COUNTER_MODE): Counter mode 2 (GATED_LOW): Gated timer mode with gate active low 3 (GATED_HIGH): Gated timer mode with gate active high |
| T5R | Timer T5 run bit 0 (STOP): Timer T5 stops 1 (RUN): Timer T5 runs |
| T5UD | Timer T5 up/down control 0 (UP): Timer T5 counts up 1 (DOWN): Timer T5 counts down |
| T5UDE | Timer T5 external up/down enable 0 (T5UD): Count direction is controlled by bit T5UD; input T5EUD is disconnected 1 (T5EUD): Count direction is controlled by input T5EUD |
| T5RC | Timer T5 remote control 0 (T5R): Timer T5 is controlled by its own run bit T5R 1 (T6R): Timer T5 is controlled by the run bit T6R of core timer T6, not by bit T5R |
| CT3 | Timer T3 capture trigger enable 0 (CAPIN): Capture trigger from input line CAPIN 1 (T3IN): Capture trigger from T3 input lines T3IN and/or T3EUD |
| CI | Register CAPREL capture trigger selection 0 (DISABLED): Capture disabled 1 (POSITIVE): Positive transition (rising edge) on CAPIN 2 (NEGATIVE): Negative transition (falling edge) on CAPIN or any transition on T3EUD 3 (ANY): Any transition (rising or falling edge) on CAPIN or any transition on T3IN or T3EUD |
| T5CLR | Timer T5 clear enable bit 0 (NOT_CLEARED): Timer T5 is not cleared on a capture event 1 (CLEARED): Timer T5 is cleared on a capture event |
| T5SC | Timer T5 capture mode enable 0 (DISABLED): Capture into register CAPREL disabled 1 (ENABLED): Capture into register CAPREL enabled |