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Infineon /tle984x /PMU /SLEEP

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Interpret as SLEEP

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Without_reset_execution)WAKE_W_RST 0 (ENABLE)EN_0V9_N 0 (DISABLE)CYC_WAKE_EN 0 (DISABLE)CYC_SENSE_EN 0 (Mantissa_value_1)CYC_SENSE_M03 0 (Exponent_value_0)CYC_SENSE_E01 0 (Mantissa_value_1)CYC_WAKE_M03 0 (Exponent_value_0)CYC_WAKE_E01 0 (Delay_time_0)CYC_SENSE_S_DEL

CYC_WAKE_M03=Mantissa_value_1, CYC_SENSE_M03=Mantissa_value_1, CYC_WAKE_E01=Exponent_value_0, EN_0V9_N=ENABLE, WAKE_W_RST=Without_reset_execution, CYC_SENSE_S_DEL=Delay_time_0, CYC_WAKE_EN=DISABLE, CYC_SENSE_E01=Exponent_value_0, CYC_SENSE_EN=DISABLE

Description

PMU sleep behavior register

Fields

WAKE_W_RST

Wake-up with reset execution

0 (Without_reset_execution): Stop-exit without reset execution

1 (With_reset_execution): Stop-exit with reset execution
EN_0V9_N

Enables the reduction of the VDDC regulator output to reduced voltage during stop mode

0 (ENABLE): Output voltage reduction enabled

1 (DISABLE): Output voltage reduction disabled
CYC_WAKE_EN

Enabling cyclic wake

0 (DISABLE): Cyclic wake disabled

1 (ENABLE): Cyclic wake enabled
CYC_SENSE_EN

Enabling cyclic sense

0 (DISABLE): Cyclic sense disabled

1 (ENABLE): Cyclic sense enabled
CYC_SENSE_M03

Mantissa

0 (Mantissa_value_1): Mantissa value is 1

15 (Mantissa_value_16): Mantissa value is 16
CYC_SENSE_E01

Exponent

0 (Exponent_value_0): Exponent value is 0

1 (Exponent_value_1): Exponent value is 1

2 (Exponent_value_2): Exponent value is 2

3 (Exponent_value_3): Exponent value is 3
CYC_WAKE_M03

Mantissa

0 (Mantissa_value_1): Mantissa value is 1

15 (Mantissa_value_16): Mantissa value is 16
CYC_WAKE_E01

Exponent

0 (Exponent_value_0): Exponent value is 0

1 (Exponent_value_1): Exponent value is 1

2 (Exponent_value_2): Exponent value is 2

3 (Exponent_value_3): Exponent value is 3
CYC_SENSE_S_DEL

Sample delay in cyclic sense mode

0 (Delay_time_0): Is 10 us

1 (Delay_time_1): Is 20 us

2 (Delay_time_2): Is 30 us

3 (Delay_time_3): Is 40 us

4 (Delay_time_4): Is 60 us

5 (Delay_time_5): Is 80 us

6 (Delay_time_6): Is 100 us

7 (Delay_time_7): Is 150 us

Links

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Register License

Copyright © 2022 Infineon Technologies AG Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the “Software”) to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following: The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor. THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data