Infineon /tle984x /PORT /P1_DIR

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Interpret as P1_DIR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PP0 0 (0)PP1 0 (0)PP2 0 (0)PP4 0 (0)PP0_INEN 0 (0)PP1_INEN 0 (0)PP2_INEN 0 (0)PP3_INEN

PP0_INEN=0, PP3_INEN=0, PP0=0, PP4=0, PP2=0, PP1=0, PP2_INEN=0, PP1_INEN=0

Description

Port 1 direction register

Fields

PP0

Port 1 pin 0 direction control

0 (0): Direction is set to input (default)

1 (1): Direction is set to output

PP1

Port 1 pin 1 direction control

0 (0): Direction is set to input (default)

1 (1): Direction is set to output

PP2

Port 1 pin 2 direction control

0 (0): Direction is set to input (default)

1 (1): Direction is set to output

PP4

Port 1 pin 4 direction control

0 (0): Direction is set to input (default)

1 (1): Direction is set to output

PP0_INEN

Port 1 pin 0 input Schmitt trigger enable (only valid if IO is configured as output)

0 (0): Schmitt trigger is disabled (default)

1 (1): Schmitt trigger is enabled

PP1_INEN

Port 1 pin 1 input Schmitt trigger enable (only valid if IO is configured as output)

0 (0): Schmitt trigger is disabled (default)

1 (1): Schmitt trigger is enabled

PP2_INEN

Port 1 pin 2 input Schmitt trigger enable (only valid if IO is configured as output)

0 (0): Schmitt trigger is disabled (default)

1 (1): Schmitt trigger is enabled

PP3_INEN

Port 1 pin 4 input Schmitt trigger enable (only valid if IO is configured as output)

0 (0): Schmitt trigger is disabled (default)

1 (1): Schmitt trigger is enabled

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