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Infineon /tle984x /SCU /ADC1_CLK

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Interpret as ADC1_CLK

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (10)ADC1_CLK_DIV 0 (1)DPP1_CLK_DIV

DPP1_CLK_DIV=1, ADC1_CLK_DIV=10

Description

ADC1 peripheral clock register

Fields

ADC1_CLK_DIV

ADC1 clock divider

0 (10): Divide by {$n+1}

1 (21): Divide by {$n+1}

2 (32): Divide by {$n+1}

3 (43): Divide by {$n+1}

4 (54): Divide by {$n+1}

6 (16): Divide by 16
DPP1_CLK_DIV

ADC1 post processing clock divider

0 (1): Divide by 1

1 (2): Divide by 2

2 (3): Divide by 3

3 (4): Divide by 4

Links

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Register License

Copyright © 2022 Infineon Technologies AG Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and accompanying documentation covered by this license (the “Software”) to use, reproduce, display, distribute, execute, and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the Software is furnished to do so, all subject to the following: The copyright notices in the Software and this entire statement, including the above license grant, this restriction and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all derivative works of the Software, unless such copies or derivative works are solely in the form of machine-executable object code generated by a source language processor. THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data