Infineon /tle984x /SCU /COCON

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as COCON

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (1)COREL0 (OSCILLATOR)COUTS0 0 (DISABLED)TLEN 0 (fCCLK)COUTS1 0 (NO_EXTERNAL)EN

TLEN=DISABLED, COUTS1=fCCLK, COUTS0=OSCILLATOR, COREL=1, EN=NO_EXTERNAL

Description

Clock output control register

Fields

COREL

Clock output divider

0 (1): fSYS

1 (2): fSYS/2

2 (3): fSYS/3

3 (4): fSYS/4

4 (6): fSYS/6

5 (8): fSYS/8

6 (10): fSYS/10

7 (12): fSYS/12

8 (14): fSYS/14

9 (16): fSYS/16

10 (18): fSYS/18

11 (20): fSYS/20

12 (24): fSYS/24

13 (32): fSYS/32

14 (36): fSYS/36

15 (40): fSYS/40

COUTS0

Clock out source select bit 0

0 (OSCILLATOR): Oscillator output frequency is selected

1 (COREL): Clock output frequency is chosen by the bit field COREL

TLEN

Toggle latch enable

0 (DISABLED): Toggle latch is disabled. Clock output frequency is chosen by the bit field COREL

1 (ENABLED): Toggle latch is enabled. Clock output frequency is half of the frequency that is chosen by the bit field COREL. The resulting output frequency has 50% duty cycle

COUTS1

Clock out source select bit 1

0 (fCCLK): fCCLK is selected

1 (COUTS0): Based on setting of COUTS0

EN

CLKOUT enable

0 (NO_EXTERNAL): No external clock signal is provided

1 (EXTERNAL): The configured external clock signal is provided

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