Infineon /tle984x /SCU /EDCCON

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Interpret as EDCCON

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (false)RIE 0 (false)NVMIE

RIE=false, NVMIE=false

Description

Error detection and correction control register

Fields

RIE

RAM double bit ECC error interrupt enable

0 (false): No NMI is generated when a double bit ECC error occurs reading RAM

1 (true): An NMI is generated when a double bit ECC error occurs reading RAM

NVMIE

NVM double bit ECC error interrupt enable

0 (false): No NMI is generated when a double bit ECC error occurs reading NVM

1 (true): An NMI is generated when a double bit ECC error occurs reading NVM

Links

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