MIS_0=SSCx_M_MRST, SIS=SSCx_S_MTSR, MIS_1=Default, CIS=SSCx_S_SCK
Port input select register
MIS_0 | Master mode input select bit 0 (master mode only) 0 (SSCx_M_MRST): (x = 1 or 2, dependent form current SSC) 1 (SSC12_M_MRST): For both SSCs |
SIS | Slave mode input select (slave mode only) 0 (SSCx_S_MTSR): (x = 1 or 2, dependent form current SSC) 1 (SSC12_S_MTSR): For both SSCs |
CIS | Clock input select (slave mode only) 0 (SSCx_S_SCK): (x = 1 or 2, dependent form current SSC) 1 (SSC12_S_SCK): For both SSCs |
MIS_1 | Master mode input select bit 1 (master mode only) 0 (Default): Inputs selected according to MIS_0 1 (Do_not_use): Connects to unused pins |