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Keil /AT32A403Axx_v2 /I2C1 /CTRL2

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Interpret as CTRL2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLKFREQ0 (ERRIEN)ERRIEN 0 (EVTIEN)EVTIEN 0 (DATAIEN)DATAIEN 0 (DMAEN)DMAEN 0 (DMAEND)DMAEND

Description

Control register 2

Fields

CLKFREQ

Input clock frequency
ERRIEN

Error interrupt enable
EVTIEN

Event interrupt enable
DATAIEN

Data transmission interrupt enable
DMAEN

DMA transfer enable
DMAEND

DMA transfer end indication

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data