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Keil /AT32F402xx_v2 /SCFG /CFG1

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Interpret as CFG1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MEM_MAP_SEL 0 (IR_POL)IR_POL 0IR_SRC_SEL

Description

configuration register 1

Fields

MEM_MAP_SEL

Memory address mapping selection bits
IR_POL

IR output polarity selection
IR_SRC_SEL

IR signal source selection

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data