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Keil /AT32F402xx_v2 /TMR10 /CTRL1

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Interpret as CTRL1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TMREN)TMREN 0 (OVFEN)OVFEN 0 (OVFS)OVFS 0 (OCMEN)OCMEN 0 (OWCDIR)OWCDIR 0TWCMSEL 0 (PRBEN)PRBEN 0CLKDIV

Description

Control register 1

Fields

TMREN

TMR enable
OVFEN

Overflow event enable
OVFS

Overflow event source
OCMEN

One cycle mode enable
OWCDIR

One-way count direction
TWCMSEL

Two-way count mode selection
PRBEN

Period buffer enable
CLKDIV

Clock divider

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data