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Keil /AT32F405xx_v2 /CRM /APB2RST

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Interpret as APB2RST

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TMR1RST)TMR1RST 0 (USART1RST)USART1RST 0 (USART6RST)USART6RST 0 (ADCRST)ADCRST 0 (SPI1RST)SPI1RST 0 (SCFGRST)SCFGRST 0 (TMR9RST)TMR9RST 0 (TMR10RST)TMR10RST 0 (TMR11RST)TMR11RST 0 (I2S5RST)I2S5RST 0 (ACCRST)ACCRST 0 (OTGHSPHYRST)OTGHSPHYRST

Description

APB2 peripheral reset register (CRM_APB2RST)

Fields

TMR1RST

Timer1 reset
USART1RST

USART1 reset
USART6RST

USART6 reset
ADCRST

ADC reset
SPI1RST

SPI1 reset
SCFGRST

SCFG reset
TMR9RST

Timer9 reset
TMR10RST

Timer10 reset
TMR11RST

Timer 11 reset
I2S5RST

I2S5 reset
ACCRST

ACC reset
OTGHSPHYRST

OTGHS phy reset

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data