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Keil /AT32F405xx_v2 /DVP /SCR

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Interpret as SCR

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https://regviz.com/r/Keil/AT32F405xx_v2/DVP/SCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FMSC0LNSC0LNEC0FMEC

Description

Synchronization code register

Fields

FMSC

Frame start code
LNSC

Line start code
LNEC

Line end code
FMEC

Frame end code

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data