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Keil /AT32F405xx_v2 /EXINT /POLCFG1

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Interpret as POLCFG1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RP0)RP0 0 (RP1)RP1 0 (RP2)RP2 0 (RP3)RP3 0 (RP4)RP4 0 (RP5)RP5 0 (RP6)RP6 0 (RP7)RP7 0 (RP8)RP8 0 (RP9)RP9 0 (RP10)RP10 0 (RP11)RP11 0 (RP12)RP12 0 (RP13)RP13 0 (RP14)RP14 0 (RP15)RP15 0 (RP16)RP16 0 (RP17)RP17 0 (RP18)RP18 0 (RP19)RP19 0 (RP20)RP20 0 (RP21)RP21 0 (RP22)RP22

Description

Rising polarity configuration register

Fields

RP0

Rising polarity configuration bit of line 0
RP1

Rising polarity configuration bit of line 1
RP2

Rising polarity configuration bit of line 2
RP3

Rising polarity configuration bit of line 3
RP4

Rising polarity configuration bit of line 4
RP5

Rising polarity configuration bit of line 5
RP6

Rising polarity configuration bit of linee 6
RP7

Rising polarity configuration bit of line 7
RP8

Rising polarity configuration bit of line 8
RP9

Rising polarity configuration bit of line 9
RP10

Rising polarity configuration bit of line 10
RP11

Rising polarity configuration bit of line 11
RP12

Rising polarity configuration bit of line 12
RP13

Rising polarity configuration bit of line 13
RP14

Rising polarity configuration bit of line 14
RP15

Rising polarity configuration bit of line 15
RP16

Rising polarity configuration bit of line 16
RP17

Rising polarity configuration bit of line 17
RP18

Rising polarity configuration bit of line 18
RP19

Rising polarity configuration bit of line 19
RP20

Rising polarity configuration bit of line 20
RP21

Rising polarity configuration bit of line 21
RP22

Rising polarity configuration bit of line 22

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data