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Keil /AT32F405xx_v2 /I2SF5 /CTRL2

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Interpret as CTRL2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAREN)DMAREN 0 (DMATEN)DMATEN 0 (ERRIE)ERRIE 0 (RDBFIE)RDBFIE 0 (TDBEIE)TDBEIE

Description

control register 2

Fields

DMAREN

DMA receive enable
DMATEN

DMA transmit enable
ERRIE

Error interrupt enable
RDBFIE

Receive data buffer full interrupt enable
TDBEIE

Transmit data buffer empty interrupt enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data