SD clock control register (SDIO_CLKCTRL)
| CLKDIV | Clock division |
| CLKOEN | Clock output enable |
| PWRSVEN | Power saving mode enable |
| BYPSEN | Clock divider bypass enable bit |
| BUSWS | Bus width selection |
| CLKEDS | SDIO_CK edge selection bit |
| HFCEN | Hardware flow control enable |
| CLKDIV98 | Clock divide factor bit9 and bit8 |