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Keil /AT32F421xx_v2 /SCFG /CFG1

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Interpret as CFG1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MEM_MAP_SEL 0 (PA11_12_RMP)PA11_12_RMP 0 (IR_POL)IR_POL 0IR_SRC_SEL 0 (ADC_DMA_RMP)ADC_DMA_RMP 0 (USART1_TX_DMA_RMP)USART1_TX_DMA_RMP 0 (USART1_RX_DMA_RMP)USART1_RX_DMA_RMP 0 (TMR16_DMA_RMP)TMR16_DMA_RMP 0 (TMR17_DMA_RMP)TMR17_DMA_RMP

Description

configuration register 1

Fields

MEM_MAP_SEL

Memory address mapping selection bits
PA11_12_RMP

PA11 PA12 Remap
IR_POL

IRTMR Polariyt select
IR_SRC_SEL

IRTMR source select
ADC_DMA_RMP

ADC DMA remap
USART1_TX_DMA_RMP

USART1 transmit DMA remap
USART1_RX_DMA_RMP

USART1 receive DMA remap
TMR16_DMA_RMP

TMR16 DMA remap
TMR17_DMA_RMP

TMR17 DMA remap

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data