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Keil /AT32F425xx_v2 /PWC /CTRL

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Interpret as CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VRSEL)VRSEL 0 (LPSEL)LPSEL 0 (CLSWEF)CLSWEF 0 (CLSEF)CLSEF 0 (PVMEN)PVMEN 0PVMSEL 0 (BPWEN)BPWEN

Description

Power control register (PWC_CTRL)

Fields

VRSEL

Voltage regulator state select when deepsleep mode
LPSEL

Low power mode select when Cortex-M4 sleepdeep
CLSWEF

Clear SWEF flag
CLSEF

Clear SEF flag
PVMEN

Power voltage monitoring enable
PVMSEL

Power voltage monitoring boundary select
BPWEN

Battery power domain write enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data