CTRL2

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Interpret as CTRL2

Control register 2

IDL	bit 7-4 for usart identification
IDBN	Identification bit num
BFBN	Break frame bit num
BFIEN	Break frame interrupt enable
LBCP	Last bit clock pulse
CLKPHA	Clock phase
CLKPOL	Clock polarity
CLKEN	Clock enable
STOPBN	STOP bit num
LINEN	LIN mode enable
TRPSWAP	Transmit receive pin swap
IDH	bit 7-4 for usart identification

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