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Keil /AT32F435xx_v2 /DAC /DDTH8R

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Interpret as DDTH8R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DD1DT8R0DD2DT8R

Description

DUAL DAC 8-bit right aligned data holding register (DAC_DDTH8R), Bits 31:16 Reserved

Fields

DD1DT8R

DAC1 8-bit right-aligned data
DD2DT8R

DAC2 8-bit right-aligned data

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data