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Maxim-Integrated /max32520 /DMA /INTR

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Interpret as INTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (inactive)IPEND

IPEND=inactive

Description

DMA Interrupt Register.

Fields

IPEND

Channel Interrupt. To clear an interrupt, all active interrupt bits of the DMA_ST must be cleared. The interrupt bits are set only if their corresponding interrupt enable bits are set in DMA_CN.

0 (inactive): No interrupt is pending.

1 (pending): An interrupt is pending.

Links

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Register Reference

https://github.com/analogdevicesinc/msdk