Maxim-Integrated /max32520 /GPIO0 /EN0_CLR

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Interpret as EN0_CLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0GPIO_EN0_CLR

Description

GPIO Clear Function Enable Register. Writing a 1 to one or more bits in this register clears the bits in the same positions in GPIO_EN to 0, without affecting other bits in that register.

Fields

GPIO_EN0_CLR

Mask of all of the pins on the port.

Links

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