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Maxim-Integrated /max32520 /PWRSEQ /LPCN

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Interpret as LPCN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RAMRET_EN 0 (LDO_DIS)LDO_DIS 0 (en)VCOREMON_DIS 0 (en)VDDAMON_DIS

VDDAMON_DIS=en, VCOREMON_DIS=en

Description

Low Power Control Register.

Fields

RAMRET_EN

System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit.
LDO_DIS

LDO Disabled
VCOREMON_DIS

Vcore Monitor Disable. This bit controls the power monitor on the VCore supply in all operating modes.

0 (en): Enable if Bandgap is ON (default)

1 (dis): Disabled.
VDDAMON_DIS

VDDA Monitor Disable. This bit controls the power monitor of the Analog Supply in all operating modes.

0 (en): Enable if Bandgap is ON (default)

1 (dis): Disabled.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk