Regviz

Maxim-Integrated /max32520 /PWRSEQ /LPMEMSD

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LPMEMSD

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Maxim-Integrated/max32520/PWRSEQ/LPMEMSD#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (normal)RAM0 0 (normal)RAM1 0 (normal)RAM2 0 (normal)RAM3 0 (normal)RAM4 0 (normal)ICACHE 0 (normal)ICACHEXIP 0 (normal)ROM

RAM1=normal, RAM0=normal, RAM2=normal, ICACHE=normal, RAM3=normal, ICACHEXIP=normal, RAM4=normal, ROM=normal

Description

Low Power Memory Shutdown Control.

Fields

RAM0

System RAM block 0 Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
RAM1

System RAM block 1 Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
RAM2

System RAM block 2 Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
RAM3

System RAM block 3 Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
RAM4

System RAM block 4 Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
ICACHE

Instruction Cache RAM Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
ICACHEXIP

XiP Instruction Cache RAM Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.
ROM

ROM Shut Down.

0 (normal): Normal Operating Mode.

1 (shutdown): Shutdown Mode.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk